An AI chip starts as quartz and ends as a 132 kW rack. Ten steps, a handful of near-monopolies. Which step actually limits how many AI chips the world can make in 2026?
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Tap the step you think is binding in 2026: the one where demand runs furthest above capacity.
Tightness of each step by period. Switch periods: the red bar changes places.
If you learned the AI chip story in 2023–24, your answer was probably CoWoS packaging, and you were right then. By 2026 the reports point somewhere else: the front-end fab, specifically TSMC's 3nm wafers, as every major accelerator family moves onto the same node at once.
And it isn't the famous monopoly that's pinching. ASML is shipping more EUV scanners (aiming for 60+ in 2026 vs 48 in 2025). The cited limit is cleanroom space: buildings take years, so the fab can't be hurried even with tools available.
The lesson travels: a bottleneck is where demand meets the slowest-to-build capacity, and that moves. Fixing one (CoWoS grew more than 80% a year) hands the job to the next.
Ordinary-answer check: if your guess was "the fab", the headline agrees with you, but the reason (3nm demand convergence and cleanroom lead times, not EUV tools) is probably not the one you had in mind.
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